Author Details
Yelina, E. I.
| Issue | Section | Title | File |
| Vol 53, No 5 (2024) | MODELING | Investigation of ways to synthesize concurrent error-detection circuits based on boolean signals correction using uniform separable codes |
| Issue | Section | Title | File |
| Vol 53, No 5 (2024) | MODELING | Investigation of ways to synthesize concurrent error-detection circuits based on boolean signals correction using uniform separable codes |